ARMv7 does not support STL instruction

Also need to add a SEV instruction in ARMv7 spin_unlock which
is implicit in ARMv8.

Signed-off-by: Etienne Carriere <[email protected]>

diff --git a/include/common/aarch32/asm_macros.S b/include/common/aarch32/asm_macros.S
index f5737449e87cf4987e7b5f09ce050d9bf247bc13..0d1a37d1ecb0eb09abcfd4ce0443dcb6ebd93e74 100644 (file)
--- a/include/common/aarch32/asm_macros.S
+++ b/include/common/aarch32/asm_macros.S
@@ -79,6 +79,15 @@
        ldr r0, =(\_name + \_size)
        .endm
 
+#if (ARM_ARCH_MAJOR == 7)
+       /* ARMv7 does not support stl instruction */
+       .macro stl _reg, _write_lock
+       dmb
+       str     \_reg, \_write_lock
+       dsb
+       .endm
+#endif
+
        /*
         * Helper macro to generate the best mov/movw/movt combinations
         * according to the value to be moved.

diff --git a/lib/locks/exclusive/aarch32/spinlock.S b/lib/locks/exclusive/aarch32/spinlock.S
index bc77bc9c4d9dfda1ad14706c54f5d3c12acd7c30..9492cc0813a7dc41d3bb2d3d47e16c6d4c7f22d7 100644 (file)
--- a/lib/locks/exclusive/aarch32/spinlock.S
+++ b/lib/locks/exclusive/aarch32/spinlock.S
@@ -9,6 +9,17 @@
        .globl  spin_lock
        .globl  spin_unlock
 
+#if ARM_ARCH_AT_LEAST(8, 0)
+/*
+ * According to the ARMv8-A Architecture Reference Manual, "when the global
+ * monitor for a PE changes from Exclusive Access state to Open Access state,
+ * an event is generated.". This applies to both AArch32 and AArch64 modes of
+ * ARMv8-A. As a result, no explicit SEV with unlock is required.
+ */
+#define COND_SEV()
+#else
+#define COND_SEV()     sev
+#endif
 
 func spin_lock
        mov     r2, #1
@@ -27,5 +38,6 @@ endfunc spin_lock
 func spin_unlock
        mov     r1, #0
        stl     r1, [r0]
+       COND_SEV()
        bx      lr
 endfunc spin_unlock